Build date: 1769382003 - Sun Jan 25 23:00:03 UTC 2026
Build cvs date: 1769379343 - Sun Jan 25 22:15:43 UTC 2026
Build id: 2026-01-26.1
Build tags: amd64-regress ports sysupgrade

Applied the following diff(s):
/home/anton/tmp/robsd/src-sys-em.diff
/home/anton/tmp/robsd/src-sys-uhidev-sispm.diff
/home/anton/tmp/robsd/src-sysupgrade.diff

P lib/libcrypto/sha/sha1_aarch64_ce.S
P lib/libcrypto/sha/sha256_aarch64_ce.S
P lib/libcrypto/sha/sha512_aarch64_ce.S
P regress/lib/libcrypto/Makefile
U regress/lib/libcrypto/assembly/Makefile
P regress/lib/libcrypto/sha/sha_test.c
P sys/arch/arm64/stand/efiboot/conf.c
P sys/arch/arm64/stand/efiboot/efiboot.c
P sys/dev/acpi/xhci_acpi.c
P sys/dev/fdt/dwpcie.c
P sys/dev/fdt/qcrng.c
P sys/dev/fdt/xhci_fdt.c
P sys/dev/ofw/ofw_misc.c
M sys/dev/usb/uhidev.c
P usr.bin/file/magdir/linux
M usr.sbin/bgpd/session.c

commit uuk1ukSHGzsNNAhM
Author: fcambus
Date: 2026/01/25 22:15:43

  file(1): add support for PSF2 fonts detection.

  From NetBSD.

  OK dlg@, rsadowski@

  usr.bin/file/magdir/linux

commit yWOvGjbPHsNtWrUf
Author: kettenis
Date: 2026/01/25 18:19:13

  Add mappings for a few more Qualcomm Snapdragon X1 laptops.

  ok patrick@

  sys/arch/arm64/stand/efiboot/conf.c
  sys/arch/arm64/stand/efiboot/efiboot.c

commit JQvkqyt2p15WPeL9
Author: kettenis
Date: 2026/01/25 18:13:04

  Also match on qcom,trng.

  ok patrick@

  sys/dev/fdt/qcrng.c

commit QTr9gQLy4Hw84p9Z
Author: tb
Date: 2026/01/25 14:57:43

  assembly regress: use make's MACHINE_ARCH rather than handrolling it

  discussed with jsing

  regress/lib/libcrypto/assembly/Makefile

commit IVumav2CLegw5nIH
Author: kettenis
Date: 2026/01/25 12:09:50

  Add Qualcomm SC7280 support.

  ok patrick@

  sys/dev/fdt/dwpcie.c

commit Mr4rs8jXU8luNHjS
Author: kettenis
Date: 2026/01/25 11:56:57

  On the Qualcomm SC7280/QCS6490 SoC there is a second cell in the IOMMU
  specifier that represents an SMR mask.  However the "iommu-map" property
  only specifies how the stream ID gets mapped.  Adjust the implementation
  of iommu_device_lookup_pci() based on these new insights.  This means that
  for PCI devices we pass an SMR mask of zero.  That seems to match what
  Linux does.

  ok patrick@

  sys/dev/ofw/ofw_misc.c

commit RUkwb3eLxZbCDpC7
Author: kettenis
Date: 2026/01/25 10:29:17

  Add ID for Qualcomm QCS6490 USB controllers.

  ok patrick@

  sys/dev/acpi/xhci_acpi.c

commit dQe70xC9iMAnIHqH
Author: kettenis
Date: 2026/01/25 10:28:16

  Add support for the "flattened" USB controller nodes found on newer
  or revised device trees for Qualcomm SoCs.

  ok patrick@

  sys/dev/fdt/xhci_fdt.c

commit Uo01Y5feWKjvkYPI
Author: jsing
Date: 2026/01/25 10:20:37

  Fix tyo

  regress/lib/libcrypto/sha/sha_test.c

commit SNV6XE3QPYGd8xJV
Author: jsing
Date: 2026/01/25 10:20:09

  Hook assembly regress

  regress/lib/libcrypto/Makefile

commit aFukp0FAn7QI8uDR
Author: jsing
Date: 2026/01/25 10:18:39

  Add a regress test that ensures our pure assembly code builds with gcc

  This requires egcc to be installed, if not we'll just skip the test.

  Discussed with tb@

  regress/lib/libcrypto/assembly/Makefile

commit Q2MSus3wuIspEjkR
Author: jsing
Date: 2026/01/25 08:22:17

  Make SHA aarch64 assembly build with gcc.

  gcc is extremely fussy about register naming and insists on q and s naming
  for the ARM CE SHA instructions, even though they're referring to the same
  register (while LLVM just figures it out). Work around this by mapping
  registers to their required variant at usage and defining a handful of
  mappings between v registers and alternate names/views.

  This is still somewhat ugly, but seems to be one of the cleaner options
  that will allow portable to enable SHA assembly on platforms that use gcc.

  ok kenjiro@ tb@

  lib/libcrypto/sha/sha1_aarch64_ce.S
  lib/libcrypto/sha/sha256_aarch64_ce.S
  lib/libcrypto/sha/sha512_aarch64_ce.S